34 Comments

  1. What about building a small portion of the chip where the spatial relationship of the wires corresponds to their logical relationship, such that the degree and quantity of tunneling errors you produce corresponds to the degree and quantity of logical error? Could you then have some arbitrarily small wires running at arbitrarily high clock speeds and utilize it for particular tasks where speed is more important than accuracy and determinism?

  2. I'm surprised John didn't mention the other big limiting factor which would help what he explained make more sense: the speed of light. Information travels on these wires at the speed of light, and since we can't make the speed of light faster, we just jam transistors closer together to shorten the travel distance of current. That leads to the explained problem where it's getting too condensed and quantum tunneling happens. At this point the chips also get insanely hot so you have a problem with keeping the chips from overheating

  3. It is crazy that John Carmack, a software genius, is explaining the end of the road for Moore's Law, a fabrication (hardware) limitation preventing packing more transistors on chips. Ask this guy about VR or Game Engine Development…even gaming in general.

    That said, I enjoyed his answer and learned some things and I'm pretty familiar with all this stuff.

Leave a Reply

© 2024 FYTube Online - FYTube.Com

Partners: Omenirea.Ro , masini in rate